Set clocks and resets for each conduit.Add one new conduit for each data signal.
Select DSP Builder IP core (aka custom component), select Edit. vhd files to IP catalog search path via Platform Designer top toolbar Tools > Options.Ĥ.
Import _hw.tcl into Platform Designer by adding folder containing _hw.tcl and. Edit _hw.tcl using any text editor, set EDITABLE property to "true" near top of fileģ. Generate _hw.tcl representing contents of DSPBuilder IP core using MATLAB play button.Ģ. The workaround procedure I developed for configuring DSP Builder-generated custom components to ensure their data signal ports are compatible with connecting to data signal ports on HDL Coder-generated custom components in Platform Designer/Qsys is as follows:ġ. I found a workaround for my problem on my own, thanks to your tips. How would I go about editing the DSP Builder generated custom component to ensure that each of its external data signals are mapped to distinct individual conduits in Qsys, instead of being all lumped into a single conduit "exp"? Is there an option to configure this data-singal-to-conduit mapping in the MATLAB Simulink DSPBA Blockset, or would I have to manually edit the generated _hw.tcl file used to import the custom component into Qsys? Out2, Out3).Īn example of this kind of connection between Qsys components shown in the above screenshot would be connecting Out1 on HDLCoder component -> In3 on DSPBuilder component, and connecting Out3 on DSPBuilder component to In5 on HDLCoder component.Ĭurrently, DSP Builder generated custom components have all of their data signals mapped to one single conduit labeled "exp", making it difficult to connect data signals between this DSP Builder generated custom component and an HDL coder generated custom component. I would like to customize the DSPBuilder-generated custom component (bottom) to have the same data-signal-to-conduit mapping convention in Qsys as the HDL coder generated custom component in Qsys (top). In other words, I would like each of the data signals on the DSPBuilder-generated custom component (data_In3, data_Out3) each mapped to their own distinct conduits, to facilitate directly connecting them to distinct data signal conduits on the HDL-coder generated custom component (In4, In5. An example of the Qsys implementation of an HDL coder custom component and a DSP Builder custom component are shown below, from top to bottom. The problem that I have been running into is that the HDL coder and DSP builder-generated custom components seem to follow different conventions for mapping their data signals to connection points in Qsys i.e. I intend to connect several data signals between the HDL coder custom component and the DSP Builder custom component in Qsys.
DSP BUILDER CONDUITS OR STREAMING MANUAL
I have been using page 66 of this DSPBA manual as a reference guide for importing DSPBuilder-generated custom components into Qsys/Platform designer. I import both of these IP cores as custom components in an existing Qsys/platform designer project for my board (DE10-Nano). I also use DSP Builder to generate an IP core specializing in NCO/Mixer/Filter components, also containing ports for external data signals. In my system, I use MATLAB HDL coder to generate an IP core facilitating host to target communication with an AXI bus, and a set of external data signals each mapped to their own distinct individual connection points i.e.
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